By Analog Devices, Amy Mar

This reference for the ADSP-2100 relations is an architectural and code-compatible set of 16-bit fixed-point DSP microprocessors that supply various degrees of characteristic integration. It deals quick, versatile mathematics for all computations together with the multiply-accumulate, prolonged dynamic diversity in computations to reduce scaling, trunkation, and slipping, software sequencing with zero-overhead looping, twin facts tackle iteration with round buffering and bit-reversed addressing, and three-bus Harvard structure permitting single-cycle fetch of either guideline and info values.

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**Additional info for Digital Signal Processing Applications Using the ADSP 2100 Family, Volume I**

**Sample text**

Computer Systems Architecture, Second Edition. : Prentice-Hall, Inc. 1 OVERVIEW In fixed-point number representation, the radix point is always at the same location. While this convention simplifies numeric operations and conserves memory, it places a limit on the magnitude and the precision of the number representation. In situations that require a large range of numbers or high resolution, a relocatable radix point is desirable. Very large and very small numbers can be represented in floating-point format.

The routine reads the exponents of the input operands from AX0 and AY0 and the corresponding fractions from AX1 and AY1. Upon return, AR holds the exponent of the result and SR1 holds the fraction. The routine first determines the operand with the largest exponent and shifts the fractional part of the other operand to equate the exponents. The fractions are added to form an unnormalized sum. This sum is fed to the exponent detector (in HIX mode to allow for overflow in the ALU) to determine the direction and magnitude of the shift required to normalize the number.

Repeat step 2 until each word of the multiplicand has been multiplied by every word of the multiplier. 23 2 Fixed-Point Arithmetic U and N are 16-bit words Nn Nn–1 ... N2 N1 N0 × Un Un–1 ... 232U0N2 + 216U0N1 + U0N0 216(n+1)U1Nn + 216nU1Nn–1 + ... 3 Multiprecision Multiplication 4. Add all the partial products together. In computing the partial products, the signed/unsigned switch of the multiplier determines whether the multiplication is signed, mixed-mode, or unsigned. Multiplication of the MSWs should be signed, and multiplication of a less significant word by either MSW should be mixedmode.