Interface Fundamentals in Microprocessor-Controlled Systems by Chris Georgopoulos

By Chris Georgopoulos

`...this is a booklet which supplies an invaluable addition to the library of these operating during this region. the data has been completely researched and is obviously written.'
Microprocessors and Microsystems, 10:5 (1986)

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ECl·.......... 2. Compar~son of CMOS performance evaluation to ECL and TTL devices; 3 (Copyright © Canhnes Publishing Co. Reproduced here by kind per~ 1982 mission of Cahners PubZishing Co. L. Sanquini). ~P-LOGIC FAMILIES INTERFACES 29 stem, however, the power supply only occupies 10% of the total volume 10 • In addition, one can eliminate cooling fans and their associated enclosure openings and dust filters. 2 shows that CMOS technology, in comparison to ECL and TTL devices, is a strong industry trend 13 • CMOS ,has become attractive as VLSI pushes other fabrication technologies beyond the n-J-per-package thermal limits of low-cost plastic packaging.

Indeed, LS TTL byte-output ports consume less power, have greater drive capability, are more rugged and cost less s • 54/74ALS 54/74AS Low Level Output (F~om Ref. 4 by permission of the Indicates dash 1 spec. A. 5 Unit line Driver Min Typ Max RECOMMENDED OPERATING CONDITIONS FOR "ALS" AND "AS" DEVICES TAB L E '"tj CI:I \J'I N til CI:I ~ i til H ~ C"l 8H f. 'C 26 CHAPTER 2 The outputs of ALS and AS can be standard, buffered or driving outputs. 2. Interface Devices from ECL Logic Families Emitter coupled logic is a non-saturating form of digital logic which eliminates transistor storage time as a speed limiting characteristic, permitting high speed operation.

R. Blood, Jr, MECL System Design Handbook. , 1972. A. Co 11 ymore, " How to Calculate Realistic Load Limits in Digital Systems," EEE, p. 52, July 1968. • K. 80-84, December 6, 1975. L. Wollesen, " C-MOS LSI: Comparing Second-Generation Approaches," Electronics, pp. 116-123, September 13, 1979. E. , "Linear CMOS ICs are Stellar Performers", Electronic Design, p. 131, September 1, 1983. T. Greer, Jr. and Bob Bailey, "Speed UP. Power Down for Bipolar Logic," Computer Design. 161, November 1984. A.

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